DBBC Backend General Features
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4 RF/IF Input from 16 in a range up to 2.200 GHz
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Fout polarizations or bands available for a group of 64 output data channel selection (2 VSI output connectors with at present 1 or 2 GB/s each)
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1024 MHz sampling clock frequency
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Channel bandwidth: 32 and 512 MHz, U&Q
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Tuning step 1 Hz with 230 Hz sampling clock
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Multiple architecture using fully re-configurable FPGA CoreBoard
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Modular realization for cascaded stack processing
